Computer organization and architecture miscellaneous

Computer organization and architecture miscellaneous

Easy Questions

Computer Organization and Architecture

Computer organization and architecture miscellaneous
  1. Which is the most appropriate match for the items in the first column with the items in the second column?









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    Indexed addressing is used for array implementation where each element has indexes. Base register is used to re-locatable code, where starts from base address & then all local addresses as added to base address.
    Indirect addressing is done when array is passed as parameter only name is passed. Hence (a) is correct option.

    Correct Option: A

    Indexed addressing is used for array implementation where each element has indexes. Base register is used to re-locatable code, where starts from base address & then all local addresses as added to base address.
    Indirect addressing is done when array is passed as parameter only name is passed. Hence (a) is correct option.

  1. Consider the 8085 instruction IN 09H stored as follows:

    Add the following incomplete timing diagram for the instruction :

    (a) Write the contents of the boxes, A, B, C and D in hexademcimal in your answer sheet do not draw any pictures.
    (b) Write the state of both ALE and RD pins at times T1, T2, T3 and T4. (c) How do you generate the signal that tells the peripheral to put the data on the bus? Answer by completing the following statement in your answer book : By combining signals ..............








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    (a) A : D A H     B : 0 9 H
    C : 0 9 H     D : 5 1 H
    (b) ALE : T1 = 1
    T2 = T3 = T4 = 0
    RD : T1 = 1
    T2 = T3 = 0. T4 = 1
    (c) The IO/ M signal and RD signal

    Correct Option: D

    (a) A : D A H     B : 0 9 H
    C : 0 9 H     D : 5 1 H
    (b) ALE : T1 = 1
    T2 = T3 = T4 = 0
    RD : T1 = 1
    T2 = T3 = 0. T4 = 1
    (c) The IO/ M signal and RD signal

  1. Consider the following 8085 program segment, where registers B and C contain BCD values :

    (a) For the two pairs (B = 44, C = 25) and (B = 33, C = 46) at S1,
    (i) Find the values in register A when control reaches S2.
    (ii) Find the values in registers D and E when control reaches S4.
    (b) What, in general, is the value of D and E as a function of B and C when control reaches S4.








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    (a) (i) 18 H     86H
    (ii) D = 00H     D = FFH
    E = 19H     E 13H
    (b) E = | B – C |
    D = 00H     if B > C
    and D = FFH     if B < C

    Correct Option: D

    (a) (i) 18 H     86H
    (ii) D = 00H     D = FFH
    E = 19H     E 13H
    (b) E = | B – C |
    D = 00H     if B > C
    and D = FFH     if B < C

Direction: Consider the following data path of a CPU :

The ALU, the bus and all the registers in the data path are of identical size. All operations including incrementation of the PC and the GPRs are to be carried out in the ALU. Two clock cycles are needed for memory bus into the MDR.

  1. The instruction “CALL Rn, sub” is a two word instruction. Assuming that PC is incremented during the fetch cycle of the first word of the instruction, its register transfer interpretation is Rn < = PC + 1 PC < = M [PC]
    The minimum number of CPU clock cycles needed during the execution cycle of this instruction is








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    The minimum number of CPU clock cycles needed during the execution cycle = 4 As 1 cycle required to transfer already incremented value of PC and 2 cycle for getting data in MDR1 to load value of MDR in PC.

    Correct Option: B

    The minimum number of CPU clock cycles needed during the execution cycle = 4 As 1 cycle required to transfer already incremented value of PC and 2 cycle for getting data in MDR1 to load value of MDR in PC.

  1. Consider the ALU shown below :
    If the operands are in 2’s complement representation, which of the following operations can be performed by suitably setting the control lines K and C0 only (+ and – denote addition and subtraction respectively)?








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    Case I :- If k = 1, that means output of EX-OR gate is in complemented form. If add 1 (by setting CO = 1) to this complemented form then it becomes 2S complement of B. now adding A to the 2’S complement of B is nothing but subtraction.
    Case II :- If k = 0, EX-OR Simply return B. Add A to B without setting co i.e, K = 0,
    C 0 = 0, return addition of A and B ⇒ (A+ B)
    Case III :- We cannot increment A value without changing B content So A + 1 is not possible with given condition. Hence option (A) is correct.

    Correct Option: A

    Case I :- If k = 1, that means output of EX-OR gate is in complemented form. If add 1 (by setting CO = 1) to this complemented form then it becomes 2S complement of B. now adding A to the 2’S complement of B is nothing but subtraction.
    Case II :- If k = 0, EX-OR Simply return B. Add A to B without setting co i.e, K = 0,
    C 0 = 0, return addition of A and B ⇒ (A+ B)
    Case III :- We cannot increment A value without changing B content So A + 1 is not possible with given condition. Hence option (A) is correct.