Computer organization and architecture miscellaneous


Computer organization and architecture miscellaneous

Computer Organization and Architecture

  1. The most appropriate matching for the following pairs
    X : Indirect addressing 1 : Loops
    Y : Immediate addressing
    2 : Pointers
    Z : Auto decrement addressing 3 : Constants

    is









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    X : Indirect Addressing :- Pointers
    Y : Immediate Addressing :- Constant
    Z : Auto Decrement Addressing :- Loop.

    Correct Option: C

    X : Indirect Addressing :- Pointers
    Y : Immediate Addressing :- Constant
    Z : Auto Decrement Addressing :- Loop.


  1. Suppose a processor does not have any stack pointer register. Which of the following statements is true?









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    Stack pointer register holds the address of top of stack, which is the location of memory at which the CPU should resume its execution after servicing some interrupt or subroutine call. So if SP register not available then no subroutine call instructions are possible.
    Hence (a) is correct option.

    Correct Option: A

    Stack pointer register holds the address of top of stack, which is the location of memory at which the CPU should resume its execution after servicing some interrupt or subroutine call. So if SP register not available then no subroutine call instructions are possible.
    Hence (a) is correct option.



  1. In the absolute addressing mode









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    (a) Operand is inside the instruction
    → immediate addressing.
    (b) In Absolute addressing mode means address of operand is given (or inside) in the instruction.
    (c) The register containing address of the operand is specified inside the instruction.
    → resister addressing
    (d) The location of the operand is implicit
    → implicit addressing.

    Correct Option: B

    (a) Operand is inside the instruction
    → immediate addressing.
    (b) In Absolute addressing mode means address of operand is given (or inside) in the instruction.
    (c) The register containing address of the operand is specified inside the instruction.
    → resister addressing
    (d) The location of the operand is implicit
    → implicit addressing.


  1. In 8085, which of the following modifies the program counter?









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    Program counter is the register which has the next location of the program to be executed next. JMP & CALL changes the value of PC. PCHL instruction copies content of registers H & L to PC. ADD instruction after completion increments program counter. So program counter is modified in all cases. Hence (d) is correct option.

    Correct Option: D

    Program counter is the register which has the next location of the program to be executed next. JMP & CALL changes the value of PC. PCHL instruction copies content of registers H & L to PC. ADD instruction after completion increments program counter. So program counter is modified in all cases. Hence (d) is correct option.



  1. A device employing INTR line for device interrupt puts the CALL instruction on the data bus while









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    INTR is a signal which if enabled then microprocessor has interrupt enabled. It receives high INR signal & activates INTA signal, so another request can’t be accepted till CPU is busy in servicing interrupt. Hence (a) is correct option.

    Correct Option: A

    INTR is a signal which if enabled then microprocessor has interrupt enabled. It receives high INR signal & activates INTA signal, so another request can’t be accepted till CPU is busy in servicing interrupt. Hence (a) is correct option.