Computer organization and architecture miscellaneous

Computer organization and architecture miscellaneous

Easy Questions

Computer Organization and Architecture

Computer organization and architecture miscellaneous
  1. A CPU has 24-bit instructions. A program starts at address 300 (in decimal). Which one of the following is a legal program counter (all values in decimal)?








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    Each address is multiple of 3 as the starting address is 300 and is each instruction consists of 24 bit, i.e., 3 byte.
    Thus, in the given options the valid counter will be the one which is the multiple of 3. Out of the options we can see that only 600 satisfies the condition.
    Therefore, it is 600.

    Correct Option: C

    Each address is multiple of 3 as the starting address is 300 and is each instruction consists of 24 bit, i.e., 3 byte.
    Thus, in the given options the valid counter will be the one which is the multiple of 3. Out of the options we can see that only 600 satisfies the condition.
    Therefore, it is 600.

  1. Which of the following must be true for the REF (Return From Exception)
    1. It must be a TRAP instruction.
    2. It must be a privileged instruction.
    3. An exception cannot be allowed to occur during execution of an REE instruction.








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    When an RFE (Return From Exception) instruction is executed; no exception is allowed to occur during that time and also it must be a trap instruction and also a privileged one.
    Thus all the three statements are true as far as RFE is concerned.

    Correct Option: D

    When an RFE (Return From Exception) instruction is executed; no exception is allowed to occur during that time and also it must be a trap instruction and also a privileged one.
    Thus all the three statements are true as far as RFE is concerned.

  1. Which of the following is/are true of the auto-increment addressing mode?
    1. It is used in creating self-relocating code.
    2. If it is included in an Instruction Set Architecture, then an additional ALU is required for effective address calculation.
    3. The amount of increment depends on the size of the data item accessed.








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    For incrementing the data, the auto-increment addressing mode is used which purely depends on the size of the data. For example:
    Regs [R1] ← Regs [R1] + Mem [Regs [R2]
    Regs [R2] ← Regs [R2] + d

    Correct Option: C

    For incrementing the data, the auto-increment addressing mode is used which purely depends on the size of the data. For example:
    Regs [R1] ← Regs [R1] + Mem [Regs [R2]
    Regs [R2] ← Regs [R2] + d

  1. In an instruction execution pipeline, the earliest that the data TLB (Translation Look a side Buffer) can be accessed is








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    TLB is used during effective address calculation in an instruction execution pipeline. Hence (b) is correct option.

    Correct Option: B

    TLB is used during effective address calculation in an instruction execution pipeline. Hence (b) is correct option.

  1. For all delayed conditional branch instructions, irrespective of whether the condition evaluations to true or false.








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    In order to avoid the pipeline delay due to conditional branch instruction, a suitable instruction is placed below the conditional branch instruction such that the instruction will be executed irrespective of whether branch is taken or not and won't affect the program behaviour.

    Correct Option: D

    In order to avoid the pipeline delay due to conditional branch instruction, a suitable instruction is placed below the conditional branch instruction such that the instruction will be executed irrespective of whether branch is taken or not and won't affect the program behaviour.