Computer organization and architecture miscellaneous

Computer organization and architecture miscellaneous

Easy Questions

Computer Organization and Architecture

Computer organization and architecture miscellaneous
  1. In 8085, which of the following modifies the program counter?








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    Program counter is the register which has the next location of the program to be executed next. JMP & CALL changes the value of PC. PCHL instruction copies content of registers H & L to PC. ADD instruction after completion increments program counter. So program counter is modified in all cases. Hence (d) is correct option.

    Correct Option: D

    Program counter is the register which has the next location of the program to be executed next. JMP & CALL changes the value of PC. PCHL instruction copies content of registers H & L to PC. ADD instruction after completion increments program counter. So program counter is modified in all cases. Hence (d) is correct option.

Direction: Consider the following assembly language program for a hypothetical processor. A, B and C are 8 registers. The meanings of various instructions are shown as comments.

  1. Which of the following instructions when inserted at location X will ensure that the value of register A after program execution is the same as its initial value?








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    In the end of program execution to check whether both initial and final value of register A is A0, we need to right rotate register A through carry by one bit. Hence (a) is correct option.

    Correct Option: A

    In the end of program execution to check whether both initial and final value of register A is A0, we need to right rotate register A through carry by one bit. Hence (a) is correct option.

  1. What are the sates of the Auxiliary Carry (AC) and carry Flag (CY) after executing the following 8085 program?
    MVI H, 5DH
    MVI L, 6BH
    MOV A, H
    ADD L








  1. View Hint View Answer Discuss in Forum

    The MVI instruction loads 5DH in H register and 6BH in L register respectively. The MOV instruction moves the contents of the source to the destination i.e., the contents of register H are copied in accumulator A. And the ADD instruction adds the contents of destination register i.e., L to the accumulator A. Thus, the program performs the above functions and adds 5DH and 6BH to obtain the result as 0101 1101 (5DH) + 0110 1011 (6BH) = 1100 1000 The result 1100 1000 is stored in the flags as

    Thus, the value stored in AC and CY is 1 and 0 respectively as the value of P flag is passed to AC as a carry.

    Correct Option: C

    The MVI instruction loads 5DH in H register and 6BH in L register respectively. The MOV instruction moves the contents of the source to the destination i.e., the contents of register H are copied in accumulator A. And the ADD instruction adds the contents of destination register i.e., L to the accumulator A. Thus, the program performs the above functions and adds 5DH and 6BH to obtain the result as 0101 1101 (5DH) + 0110 1011 (6BH) = 1100 1000 The result 1100 1000 is stored in the flags as

    Thus, the value stored in AC and CY is 1 and 0 respectively as the value of P flag is passed to AC as a carry.

  1. A device employing INTR line for device interrupt puts the CALL instruction on the data bus while








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    INTR is a signal which if enabled then microprocessor has interrupt enabled. It receives high INR signal & activates INTA signal, so another request can’t be accepted till CPU is busy in servicing interrupt. Hence (a) is correct option.

    Correct Option: A

    INTR is a signal which if enabled then microprocessor has interrupt enabled. It receives high INR signal & activates INTA signal, so another request can’t be accepted till CPU is busy in servicing interrupt. Hence (a) is correct option.

  1. Suppose a processor does not have any stack pointer register. Which of the following statements is true?








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    Stack pointer register holds the address of top of stack, which is the location of memory at which the CPU should resume its execution after servicing some interrupt or subroutine call. So if SP register not available then no subroutine call instructions are possible.
    Hence (a) is correct option.

    Correct Option: A

    Stack pointer register holds the address of top of stack, which is the location of memory at which the CPU should resume its execution after servicing some interrupt or subroutine call. So if SP register not available then no subroutine call instructions are possible.
    Hence (a) is correct option.