Advanced Microprocessors


Advanced Microprocessors

  1. The decimal equivalent of hexadecimal number E5 is—









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    14 × (16)1 + 5 × (16)° = 229 = decimal equivalent (E)8 = (14)10 Hence alternative (B) is the correct answer.

    Correct Option: B

    14 × (16)1 + 5 × (16)° = 229 = decimal equivalent (E)8 = (14)10 Hence alternative (B) is the correct answer.


  1. A 3-stage walkingar creeping counter is given below:

    How many states does this counter pass through before repeating? What is the modulo?









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    As we don't know the value of Q = 1 or 0, so there can be 2 possible sequence.

    Hence, modulo cannot be determined unless other information regarding initial value of Q given.

    Correct Option: D

    As we don't know the value of Q = 1 or 0, so there can be 2 possible sequence.

    Hence, modulo cannot be determined unless other information regarding initial value of Q given.



  1. The widely used code in data communication is









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    NA

    Correct Option: B

    NA


  1. The initial contents of 4-bit serial in-parallel out right shift, register shown below is 0110. After three clock pulses are applied, the contents of shift register will be—









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    After, 3 clk pulse data = 1010
    Hence alternative (C) is the correct answer.

    Correct Option: C


    After, 3 clk pulse data = 1010
    Hence alternative (C) is the correct answer.



  1. Below circuit of gate in (RTL) resistor transistor logic family. The circuit represents—









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    (i) V1 = O and V2 = O ⇒ Q1 = Q2 = OFF,
    VB = VCE1 = VCE2 = VCC
    Q3 = ON, VO = O
    (ii) V1 = O and V2 = 1 ⇒ Q1 = OFF, Q2 = ON, VB = Q3 = OFF
    or VO = 1
    (iii) V1 = 1 and V2 = O
    ⇒ Q1 = ON, Q2 = OFF, VB = VCE2
    ⇒ Q3 = OFF VO = 1
    (iv) V1 = 1 and V2 = 1 ⇒ Q1 = Q2 = ON, VB = O ⇒ Q3 = OFF
    VO = VCE3 or VO = 1
    Hence truth table:

    Hence the, circuit represent the relation
    ⇒ V0 = V1 + V2
    ⇒ OR gate.
    Hence alternative (D) is the correct answer.

    Correct Option: D


    (i) V1 = O and V2 = O ⇒ Q1 = Q2 = OFF,
    VB = VCE1 = VCE2 = VCC
    Q3 = ON, VO = O
    (ii) V1 = O and V2 = 1 ⇒ Q1 = OFF, Q2 = ON, VB = Q3 = OFF
    or VO = 1
    (iii) V1 = 1 and V2 = O
    ⇒ Q1 = ON, Q2 = OFF, VB = VCE2
    ⇒ Q3 = OFF VO = 1
    (iv) V1 = 1 and V2 = 1 ⇒ Q1 = Q2 = ON, VB = O ⇒ Q3 = OFF
    VO = VCE3 or VO = 1
    Hence truth table:

    Hence the, circuit represent the relation
    ⇒ V0 = V1 + V2
    ⇒ OR gate.
    Hence alternative (D) is the correct answer.