X = ABCD + ABCD + ABCD + ACBD
= BCD (A + A) + ABCD + ACBD
= BCD + BCD (A + A)
∴ A + A=1
= CD (B + B)
∴ B + B=1
= CD
Hence alternative (C) is the correct answer.

Correct Option: C

X = ABCD + ABCD + ABCD + ACBD
= BCD (A + A) + ABCD + ACBD
= BCD + BCD (A + A)
∴ A + A=1
= CD (B + B)
∴ B + B=1
= CD
Hence alternative (C) is the correct answer.

Don't know or Don't care is the meaning of 'X' in digital.

Correct Option: A

Don't know or Don't care is the meaning of 'X' in digital.

1 GHz. This high frequency is achieved by preventing the cross-coupled transistors from entering into the saturation region.

Correct Option: D

1 GHz. This high frequency is achieved by preventing the cross-coupled transistors from entering into the saturation region.

Because switching time of logic circuit in ECL is improved by estabilising one of the two states in active region instead of saturation region of transistor. The other state remains in cut-off region. This eliminates the problem of storage time and hence ECL is extremely fast with propagation delay time of 1ns (approx).

Correct Option: B

Because switching time of logic circuit in ECL is improved by estabilising one of the two states in active region instead of saturation region of transistor. The other state remains in cut-off region. This eliminates the problem of storage time and hence ECL is extremely fast with propagation delay time of 1ns (approx).

A parity check usually can detect only one bit error.

Correct Option: A

A parity check usually can detect only one bit error.