Digital electronics miscellaneous

Digital electronics miscellaneous

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Digital Electronics

Digital electronics miscellaneous
  1. A four-bit binary UP-DOWN counter is initially reset to 0000. The UP/DOWN mode select terminal designated as U/D on the pin connection diagram of the IC is tied to logic HIGH level. What would be the counter’s output state at the end of the first clock pulse?








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    Since if will work in down mode. Therefore, output after first clock pulse will be 1111.

    Correct Option: C

    Since if will work in down mode. Therefore, output after first clock pulse will be 1111.

  1. The minimum number of flip-flops needed to construct a BCD decade counter is—








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    The minimum number of flip-flops needed to construct a BCD decade counter is 4.

    Correct Option: A

    The minimum number of flip-flops needed to construct a BCD decade counter is 4.

  1. A shift counter comprising five flip-flops with an inverse feedback from the output of the MSB flip-flop to the input of the LSB flip-flops is a—








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    The required shift counter is called Johnson counter or twisted ring counter, since an inverse feedback from the output of the MSB flip-flop to the input of the LSB flip-flop is applied. Because counter comprising 5 flip-flops it means no number of stages will be 2n
    i.e., 2 × 5 = 10
    Therefore, the given counter is divide by 10 counter.

    Correct Option: B

    The required shift counter is called Johnson counter or twisted ring counter, since an inverse feedback from the output of the MSB flip-flop to the input of the LSB flip-flop is applied. Because counter comprising 5 flip-flops it means no number of stages will be 2n
    i.e., 2 × 5 = 10
    Therefore, the given counter is divide by 10 counter.

  1. The circuit given below illustrates a typical application of the JK flip-flop. What does this represent?










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    NA

    Correct Option: C

    NA

  1. In any asynchronous counter—








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    In any asynchronous counter each flip-flop output serves as clock input to the next flip-flop.

    Correct Option: D

    In any asynchronous counter each flip-flop output serves as clock input to the next flip-flop.