91. Expression for Y (A, B, C) in figure, where A, B and C are Boolean variables is—
    
    
    

1. 1. AB + AB

   
   
   

   2. A+ BC

   
   
   

   3. AB + AC

   
   
   

   4. (AB + AB)

   
   
   

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1. View Hint View Answer Discuss in Forum

   The given circuit
   From above circuit, we get
   Y = A B. 1 + AB.C + A B.0 + AB. 0
   or
   Y = A B + ABC
   or
   Y = A (B + BC) = A (B+C) = AB + AC

   
   

   Correct Option: C

   The given circuit
   From above circuit, we get
   Y = A B. 1 + AB.C + A B.0 + AB. 0
   or
   Y = A B + ABC
   or
   Y = A (B + BC) = A (B+C) = AB + AC

   
   

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92. The logic network shown below is—
    
    
    
    

1. 1. Half adder
      

   
   
   

   2. Half subtractor
      

   
   
   

   3. Full adder
      

   
   
   

   4. Full subtractor
      

   
   
   

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1. View Hint View Answer Discuss in Forum

   The logic circuit shown above is full adder.
   

   
   

   Correct Option: C

   The logic circuit shown above is full adder.
   

   
   

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93. A full adder can be realized by using—
    

1. 1. One half-adder, two OR gates
      

   
   
   

   2. Two half-adders, one OR gate
      

   
   
   

   3. Two half adders, two OR gates
      

   
   
   

   4. None of these
      

   
   
   

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1. View Hint View Answer Discuss in Forum

   A full adder can be realized by using two half-adders and one OR gate.

   Correct Option: B

   A full adder can be realized by using two half-adders and one OR gate.

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94. The difference bit output of a half-

1. 1. subtractor is the same as—
      

   
   
   

   2. Difference bit output of a full-subtractor
      

   
   
   

   3. Sum bit output of a half-adder
      

   
   
   

   4. Sum bit output of full-adder
      

   
   
   

   5. Carry bit output of a half-adder
      

   
   
   

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1. View Hint View Answer Discuss in Forum

   The difference bit output of a half-subtractor is the same as sum bit output of a half-adder

   Correct Option: B

   The difference bit output of a half-subtractor is the same as sum bit output of a half-adder

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95. Which of the following statement is not correct? Conversion of Excess-3 code to BCD can be achieved by using—
    

1. 1. Discretic gate

   
   
   

   2. 4: 16 demultiplexer
      

   
   
   

   3. A four-bit full adder
      

   
   
   

   4. A four-bit half adder

   
   
   

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1. View Hint View Answer Discuss in Forum

   NA

   Correct Option: D

   NA

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