116. In the peripheral mapped I/O, can an I/O port and an O/P port have the same port address?

1. 1. Yes

   
   
   

   2. Data insufficient

   
   
   

   3. No

   
   
   

   4. Depends on the peripheral

   
   
   

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1. View Hint View Answer Discuss in Forum

   Yes
   ∵ I/P & O/P ports are differentiated by control signals.
   

   Correct Option: A

   Yes
   ∵ I/P & O/P ports are differentiated by control signals.

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117. Assume that memory location 2075 H has a data byte 47 H. Specify the contents of the address bus A₁₅ – A₈ and the MUXD bus AD₇ – AD_O when the MPU asserts the —RD signal—

1. 1. 2075 H and 47 H

   
   
   

   2. 20 H and 47 H

   
   
   

   3. 47 H and 2075 H

   
   
   

   4. 75 H and 47 H

   
   
   

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1. View Hint View Answer Discuss in Forum

   20 H and 47 H
   (A₁₅ – A₈) = 20 H
   AD₇ – AD_O = 47 H

   Correct Option: B

   20 H and 47 H
   (A₁₅ – A₈) = 20 H
   AD₇ – AD_O = 47 H

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118. If the clock frequency is 5 MHz, how much time is required to execute an instruction of 18 T-states?

1. 1. 18 m sec

   
   
   

   2. 90 m sec

   
   
   

   3. 3.6 m sec

   
   
   

   4. Data insufficient

   
   
   

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1. View Hint View Answer Discuss in Forum

   3·6 μs
   18 T × 0·2 μs = 3·6 μs

   Correct Option: C

   3·6 μs
   18 T × 0·2 μs = 3·6 μs

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119. If the 8085 MPU adds 87H and 79H, what will be the contents of the accumulator?

1. 1. OOH

   
   
   

   2. 99 H

   
   
   

   3. 100 H

   
   
   

   4. 01 H

   
   
   

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1. View Hint View Answer Discuss in Forum

   OOH 87 + 79 = 100 H
   ⇒ Accumulator will have OOH

   Correct Option: A

   OOH 87 + 79 = 100 H
   ⇒ Accumulator will have OOH

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120. The memory address of last location of an 8 KB memory chip is FFFFH. Find the starting address—

1. 1. FOOOH

   
   
   

   2. EOO1 H

   
   
   

   3. EOOO H

   
   
   

   4. FOO1 H

   
   
   

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1. View Hint View Answer Discuss in Forum

   EOOO H

   Correct Option: C

   EOOO H

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