36. Digital multiplexer is basically a combinational logic circuit to perform the operation
    

1. 1. AND – AND

   
   
   

   2. OR – OR

   
   
   

   3. AND – OR

   
   
   

   4. OR – AND

   
   
   

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1. View Hint View Answer Discuss in Forum

   NA

   Correct Option: C

   NA

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37. Circuit in the given figure produces the output sequence
    
    

1. 1. 1111 1111 0000 0000

   
   
   

   2. 1111 0000 1111 0000

   
   
   

   3. 1111 0001 0011 0100

   
   
   

   4. 1010 1010 1010 1010

   
   
   

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1. View Hint View Answer Discuss in Forum

   NA

   Correct Option: A

   NA

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38. The address bus width of a memory of size 1024 × 8 bits is

1. 1. 10 bits

   
   
   

   2. 13 bits

   
   
   

   3. 8 bits

   
   
   

   4. 18 bits

   
   
   

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1. View Hint View Answer Discuss in Forum

   There are 1024 memory locations
   ∴ 1024 = 210
   Hence address bus width = 10 bits.

   Correct Option: A

   There are 1024 memory locations
   ∴ 1024 = 210
   Hence address bus width = 10 bits.

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39. 12 MHz clock frequency is applied to a cascaded counter of modulus-3 counter, modulus-4 counter and modulus-5 counter. What are the lowest out put frequency and the over all modulus, respectively?

1. 1. 200 kHz, 60

   
   
   

   2. 1 MHz, 60

   
   
   

   3. 3 MHz, 12

   
   
   

   4. 4 MHz, 12

   
   
   

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1. View Hint View Answer Discuss in Forum

   NA

   Correct Option: A

   NA

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40. How many gates (minimum) are needed for a 3-bit up-counter using standard binary and using T flip-flops? Assume unlimited fan-in.

1. 1. 4

   
   
   

   2. 3

   
   
   

   3. 2

   
   
   

   4. 1

   
   
   

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1. View Hint View Answer Discuss in Forum

   NA

   Correct Option: C

   NA

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