Digital electronics miscellaneous Moderate Questions and Answers

Digital electronics miscellaneous

In a ripple counter using edge-triggered JK flip-flops, the pulse input is applied to—

In a ripple counter using edge-triggered JK flip-flops the pulse input is applied to clock input of one flip flop.

Correct Option: B

In a ripple counter using edge-triggered JK flip-flops the pulse input is applied to clock input of one flip flop.

Parallel operation is preferred because—

Parallel operation is preferred because it is faster than serial operation.

Correct Option: A

Parallel operation is preferred because it is faster than serial operation.

The advantage of serial transfer compared with parallel transfer for data transmission is that—

The advantage of serial transfer compared with parallel transfer for data transfer is that it needs only one wire.

Correct Option: A

The advantage of serial transfer compared with parallel transfer for data transfer is that it needs only one wire.

In a R-S flip-flop with active-LOW inputs, for R = S = 0, Q output when the flip-flop is clocked is—

In a R-S flip-flop with active low inputs, for R = S = 0, output when the flip-flop is clocked is indeterminate.

Correct Option: A

In a R-S flip-flop with active low inputs, for R = S = 0, output when the flip-flop is clocked is indeterminate.

We have two negative edge-triggered J-K flip-flops with active-LOW inputs J and K inputs of both the flip-flops have been permanently tied to logic ‘0’. The Q output of first flip-flop. What will be the logic status of outputs Q₁ and Q₂ at the end of five clock cycles if the two outputs were cleared to logic ‘0’ before start?