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Consider a 2-way set associative cache with 256 blocks and uses LRU replacement. Initially the cache is empty. Conflict misses are those misses which occur due to contention of multiple blocks for the same cache set. Compulsory’ misses occur due to first time access to the block. The following sequence of accesses to memory blocks (0, 128, 256, 128, 0, 128 ,256, 128, 1, 129, 257, 129, 1, 129, 257, 129) is repeated 10 times. The number of conflict misses experienced by the cache is ________.
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- 111
- 27
- 76
- 98
Correct Option: C
A compulsory Miss is not considered a conflict miss if the block is accessed for the first time.
Number of lines = 256
| Number of sets (S) = | = 128 | |
| 2 |
Consider Ist Time Access for given sequence :- {0, 128, 256, 128, 0, 128, 256, 128}.
So, the Number of conflict Miss in set 1 is = 2
Similarly conflict for given rest sequence {1, 129, 257, 129, 1, 129, 257, 129}.
The number of conflict miss in set 2 is 2, then total number of conflict misses in both set for 1st time access is:
= (2 + 2) = 4.
Consider 2nd time access for the given sequence {0, 128, 256, 128, 0, 128, 256, 128}.
The number of conflict Miss in set 1 = 4 Similarly for {1, 129, 257, 129, 1, 129, 257, 129}.
The number of conflict miss in set 2 = 4. Total number of conflict misses in both sets = (4 + 4) = 8.
Note that content of each set is same before and after 2nd Iteration, therefore each of the remaining iterations will also have 8 conflict misses. Total 9 iteration take to complete the 2nd time access, so total conflict Miss in 2nd time access is = 9 × 8 = 72
Then, total conflict miss = (Ist time Access conflict Miss + 2nd time Access conflict miss = 4 + 72 = 76).
