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Analog circuits miscellaneous

  1. A hysteresis type TTL inverter is used to realize an oscillator in the circuit shown in the figure.

    If the lower and upper trigger level voltages are 0.9 V and 1.7 V, the period (in ms), for which output is LOW, is __________.

    1. 0.66
    2. 0.06
    3. 66
    4. 6.6
Correct Option: A

Given LTP = 0.9
UTP = 1.7
VC (t) = Vmax + (Vinitial – Vmax )e – t / RC
LTP = 0 + (1.7 – 0)e – t / RC = 0.9
⇒ t = 0.635 ms (Given R = 10k, C = 0.1 μF).



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