Direction: A computer has a 256 kbyte. 4-way set associative, write back data cache with block size of 32 byte. The processor sends 32 bit addresses to the cache controller. Each cache tag directory entry contains, in addition to address tag, 2 valid bit, 1 modified bit and 1 replacement bit.
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The number of bits in the tag field of an address is
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- 11
- 14
- 16
- 27
- 11
Correct Option: C
| Number of blocks in the cache (c) = | = | = 213 | ||
| Block size | 32 |
| Number of blocks in main memory (m) = | = | = 227 | ||
| Block size | 32B |
Number of blocks in each set (S) = 4
Number of tag bits = log m – log c + log S = 27 – 13 + 4 = 16 bit
