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Consider an instruction pipeline with five stages without any branch prediction: Fetch Instruction (FI), Decode Instruction (DI), Fetch Operand (FO), Execute Instruction (EI) and Write Operand (WO). The stage delays for FI, DI, FO, EI and WO are 5 ns, 7 ns, 10 ns, 8 ns and 6 ns, respectively. There are intermediate storage buffers after each stage and the delay of each buffer is 1 ns. A program consisting of 12 instructions I1, I2, I3,..., I12 is executed in this pipelined processor. Instruction I4 is the only branch instruction and its branch target is I9. If the branch is taken during the execution of this program, the time (in ns) needed to complete the program is
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- 132
- 165
- 176
- 328
- 132
Correct Option: B
Instruction pipeline with five stages without any branch predicition : Delays for FI, DI, FO.EI and WO are 5,7,10,8,6 ns respectively. The maximum time taken by any stage is 10 ns and additional 1ns is required for delay of buffer.
∴ The total time for an instruction to pass from one stage to another in 11 ns.
The instructions are executed in the following order l1, l2, l3 , l4 , l9 , l10, l11, l12
Execution with Time
Now when l4 is in its execution stage we detect the branch and when l4 is in WO stage we fetch I9 so time for execution of instructions from l9 to l12 is = 11* 5 +(4 – 1) * 11= 88 ns.
But we save 11 ns when fetching l9 i.e., l9 requires only 44 ns additional instead of 55 ns because time for fetching l9 can be overlap with WO of l4.
∴ Total Time is = 88 + 88 – 11 = 165 ns
