-
In the circuit shown in Fig. A is a parallel-in, parallel-out 4 bit register, which loads at the rising edge of the clock. The input lines are connected to a 4 bit bus. Its output acts as the input to a 16 × 4 ROM whose output is floating when the enable input E is 0. A partial table of the contents of the ROM is as follows—
The clock to the register is shown, and the data on the bus at time t1 is 0110. The data on the bus at time t2 is—
-
- 1111
- 1011
- 1000
- 0010
Correct Option: C
From given figure, when the first rising edge is coming A load the data 0110 and this data goes to ROM. This data is equivalent to 6 in decimal, so ROM O/P is 1010 and when the second rising edge come, the O/P of A goes to 1010 = 10 in decimal and give to RAM which give 1000 on the bit bus.