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A 4-bit modulo-16 ripple counter uses JK flip-flops. If the propagation delay of each flip-flop is 50 ns, the maximum clock frequency is equal to—
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- 2 MHz
- 3 MHz
- 4 MHz
- 5 MHz
- 2 MHz
Correct Option: D
Given propagation delay of one F/F = 50 ns. To design modulo-16 ripple counter we need 4 F/Fs. So, total propagation delay = 50 × 4 = 200 ns. Therefore, the maximum operating frequency
| fmax = | = | = 5 MHz | ||
| n × tpd | 200 ns |
