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The simplified block diagram of a 10-bi t A/D converter of dual slope integrator type is shown in the given figure. The 10-bit counter at the output is clocked by a 1 MHz clock. Assuming negligible timing overhead for the control logic, the maximum frequency of the analog signal that can be converted using this A/D converter is approximately _________kHz
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Correct Option: A
The waveform for dual slope integrater is shown. Maximum frequency can be at tained when
T2 – T1 = 0 and, as T1 = 2N TC (TC = clockperiod)
| ∴ fMax = | = | = | ≈ 1 kHz | |||
| 2N.TC | 2N | 1024 |
