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Computer organization and architecture miscellaneous

Computer Organization and Architecture

  1. Consider a hypothetical processor with an instruction of type LW (R1), 20 (R2). which during execution reads a 32- bit word from memory and stores it in a 32-bit register R1. The effective address of the memory location is obtained by the addition of constant 20 and the contents of register R2. Which of the following best reflects the addressing mode implemented by this instrument for the operand in memory?
    1. Immediate addressing
    2. Register addressing
    3. Register indirect scalled addressing
    4. Base indexed addressing
Correct Option: D

The addressing mode will be base index addressing. Here, 20 will work as base and content of R2 will be index. R2 is base regester here and indexing is done by adding 20 to the contents of R2.



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