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Computer organization and architecture miscellaneous

Computer Organization and Architecture

  1. In a two-level cache system, the access times of L1 and L2 caches are 1 and 8 clock cycles, respectively. The miss penalty from the L2 cache to main memory is 18 clock cycles. The miss rate of L1 cache is twice that of L2. The average memory access time (AMAT) of this cache system is 2 cycles. The miss rates of L1 and L2 respectively are :
    1. 0.111 and 0.056
    2. 0.056 and 0.111
    3. 0.0892 and 0.1784
    4. 0.1784 and 0.0892
Correct Option: A

As given that :
The access time L1 = 1 clock cycles
or (Hit time)
The access time L2 = 8 clock cycles
or (Hit time)
Miss penality L2 = 18 clock cycles
(TAvg = 2 cycles)
Miss Rate (L1 = 2X)
Miss Rate (L2 = X)
As we know that,
TAverage = Hit time L1 + (Miss Rate L1 × Miss Palenality L1) ...(1)
Miss Palenality L1 = Hit time L2 + (Miss Rate L2 × Miss Palenality L2) ....(2)
Put the given values in equation (1) and (2).
2 = 1 + 2 × (Miss Palenality 4)
1 = 2 × (L1)

X =
1
.....(3)
2L1

(Miss Palenality L1) = 8 + X. (18)

From eq. (3) put (L1) value to eq. (4)
L1 =
1
2X

1
= 8 + 18X
2X

1
- 18X = 8
2X

1 - 36X2 = 16X
36X2 + 16X - 1 = 0
Compare to aX2 + bX + c = 0
a = 36, b = 16, c = –1
=
- b ± √b² - 4ac
2a

=
-16 ± √256 + 4 × 36 × 1
2 × 36

=
-16 ± 2
=
4
(take +ve value only)
7272

X = 0.055

Then Miss rate L1 = 2X = 2 × 0.055 = 0.111
L2 = X = 0.055
Hence option (a) is correct.



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