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Computer organization and architecture miscellaneous

Computer Organization and Architecture

Direction: Consider a machine with a byte addressable main memory of 216 byte. Assume that a direct mapped data cache consisting of 32 lines of 64 byte each is used in the system. A 50 × 50 twodimensional array of bytes is stored in the main memory starting from memory location 1100H. Assume that the data cache is initially empty. The complete array is accessed twice. Assume that the contents of the data cache do not change in between the two accesses.

  1. How many data cache misses will occur in total?
    1. 48
    2. 50
    3. 56
    4. 59
Correct Option: C

The number of data cache misses that occur in total are 56 as is clear from the given data.



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